Digital/ASIC Design Engineer
1. This position is for a digital/ASIC design engineer to build next-generation analog/digital mixed SoC chips.
2. Handling every aspect in ASIC design flows including: architecture, RTL coding, Verification, Synthesis, DFT, STA and P&R.
3. Participate into the chip debug and validation.
1. BSEE with minimum 3-year of working experience or MSEE with minimum 1-year of working experience for starting position
2. MSEE with minimum 3-year of working experience for senior position.
3. Excellent knowledge for ASIC design, such as MOS transistor, arithmetic structure (addition, multiplication), timing analysis, design for test, meta-stability and etc.
4. Need fundamental understanding for digital signal processing, such as FIR/IIR filter structure, error correction, decimation and etc.
5. Usage experience (not all of them required) of industry-standard EDA tools, such as VCS/NC, Design Compiler, Primetime, Formality/Conformal and Tetramer/DFT compiler.
6. Experience in bus design (I2C, AHB or AIX), data path design (Filter, correlation or Condic) and logic control (PCS or MAC) will be a plus.
7. Experience in metrics driven verification methodology (system Verilog/UVM based) will be a plus.
8. Experience in every aspect of ASIC design will be a great plus.
You will be reporting to the Director of Digital Design.
We offer you an opportunity to work and develop yourself in the growing high-tech company, competitive salary with generous stock options. As well as, we invite you to a challenging position supported by our international team of professionals.
Please send your application to firstname.lastname@example.org with a title “Digital/ASIC Design Engineer”.